Can a Chip Learn to Be as Lazy as a Brain?

Neuromorphic computing trends

Picture a security guard who rewrites the full inventory of the building every minute, whether or not anyone has walked in. Now picture a second guard who sits quietly until a door opens. Both reach the same conclusion about who entered, but only one of them is exhausted by lunchtime.

That second guard is the idea behind neuromorphic computing. It is also the reason the topic matters for AI’s electricity bill. The International Energy Agency’s 2025 report Energy and AI estimated that data centres used about 415 terawatt-hours of electricity in 2024, roughly 1.5% of the world’s total, and projected that figure could roughly double by 2030. Any chip design that spends power only when something happens is worth a closer look.

Your brain already works this way. Raichle and Gusnard’s 2002 paper in PNAS, “Appraising the brain’s energy budget”, put the brain at about a fifth of the body’s energy use. Yet in a 2003 Current Biology paper, “The cost of cortical computation”, Peter Lennie estimated that only around 1% of cortical neurons can be strongly active at any one moment. The brain is expensive to run, and it still keeps most of itself idle.

The question for 2026 is which chips have turned that idleness into measured results, and which are still impressive demos.

What “neuromorphic” actually means

The word comes from Carver Mead, a Caltech engineer who used it in the late 1980s. His 1990 paper “Neuromorphic electronic systems” in the Proceedings of the IEEE argued that circuits could borrow the way nervous systems process information instead of forcing everything through a clock-driven digital pipeline. The word has since stretched to cover a lot of different hardware, which is why headlines can be so vague.

The most useful everyday comparison is a classroom. A conventional processor behaves like a teacher who walks to every desk every minute and asks each pupil whether anything has changed. A neuromorphic design behaves like a teacher who waits for a raised hand. Nothing happens, and nothing is spent, until a pupil has something to say.

In hardware, the raised hand is a spike. An artificial spiking neuron collects incoming signals and fires only when they add up past a threshold. If nothing arrives, it stays silent. Silence costs very little power, so a network that is mostly silent can be very cheap to run.

Two details matter later. The signals are events in time, not frames or batches. And the memory is usually stored right beside the computing part instead of far away, which saves the energy of shuttling data back and forth.

Who is building it

Four projects come up most often, and each is best judged by what it has published itself.

Intel’s Loihi. Davies and colleagues described the first Loihi chip in IEEE Micro in 2018 as a spiking processor with learning built in, holding roughly 130,000 artificial neurons. In April 2024 Intel announced Hala Point, a system of 1,152 Loihi 2 processors installed at Sandia National Laboratories, with 1.15 billion neurons. Intel’s announcement claimed efficiency above 15 trillion 8-bit operations per second per watt on conventional deep neural networks.

IBM’s NorthPole. Dharmendra Modha and his IBM Research colleagues published it in Science in October 2023, in a paper titled “Neural inference at the frontier of energy, space, and time”. NorthPole does not use spikes. Its brain-like feature is that memory sits next to the computing cores, so data barely leaves the chip. IBM’s announcement reported that on image recognition it used far less energy than a GPU built with a comparable manufacturing process, and it put the gap at 25 times.

SpiNNaker. Steve Furber’s team at the University of Manchester designed SpiNNaker as a machine for simulating large spiking networks in real time, as described in the 2014 Proceedings of the IEEE paper “The SpiNNaker Project”. The university announced in 2018 that its million-core machine had been switched on, built within the Human Brain Project. It is mainly a tool for neuroscience, and a second-generation design, SpiNNaker2, came out of TU Dresden.

BrainChip. This Australian company sells Akida, which it describes as an event-based processor for low-power devices at the edge, such as sensors that listen or watch continuously on a small battery. Unlike the other three, it is a commercial product, which means its claims come mostly from the company’s own materials.

Where the efficiency claims hold up, and where they slip

An efficiency number only means something next to the thing it was compared with. “25 times better” can be true and still depend heavily on which GPU, which manufacturing process, which task and which accuracy target were chosen. NorthPole’s comparison, for instance, was on a specific image-recognition benchmark against a GPU of a similar chip generation. Newer GPUs on newer processes narrow such gaps, and IBM’s own announcement acknowledged the comparison was against a particular class of hardware.

Hala Point shows a subtler slip. Intel’s headline efficiency figure was for conventional deep neural networks, not for spiking ones. The laziness that is the whole point of the design is not what produced the biggest number. Both facts are in the announcement if you read it closely.

A few questions help you read any claim:

Was the comparison made on the same task, at the same accuracy?
Were the chips built on a similar manufacturing process?
Does the number cover the whole system, or only the chip?
Does the workload actually use spikes, or is the chip running an ordinary network?

The field knows this is a problem. Yik and colleagues published NeuroBench in Nature Communications in 2025, a framework from a large group of researchers in academia and industry for measuring neuromorphic algorithms and systems with shared metrics. A shared yardstick is the most useful trend on this list, because every other claim gets easier to check once it exists.

The neuromorphic computing trends worth watching

Sensors and edge devices. Event cameras report only the pixels whose brightness has changed, instead of full frames. Gallego and colleagues’ 2020 survey in IEEE Transactions on Pattern Analysis and Machine Intelligence, “Event-based vision: a survey”, covers the technology and its advantages in speed and dynamic range. Pair that kind of sensor with a chip that also waits for events, and a battery-powered device can watch continuously. That is the market BrainChip describes for Akida.

Robotics. Davide Scaramuzza’s group at the University of Zurich showed in Science Robotics in 2020 (Falanga, Kleber and Scaramuzza) a quadrotor that dodged thrown objects using an event camera. The sensor’s speed is the point: a machine that reacts to change reacts sooner than one waiting for the next frame. That work used an event camera with conventional computing, so the whole sensor-to-chip pipeline is still being assembled.

Science. Smith, Aimone and colleagues at Sandia reported in Nature Electronics in 2022 that random-walk calculations, which underlie some physics simulations, can run on Loihi with energy advantages that the authors say grow as the problem does. It is a narrow result in a specialised field. It is also one of the few cases where neuromorphic hardware was used on a scientific calculation and measured against a conventional alternative.

None of these is a household product yet. The pattern is that the strongest results sit where the data really does arrive as sparse events.

The catch nobody puts in the press release

Hardware is the easy part to announce. Software is where projects stall.

Training a spiking network is harder than training a standard one, because a spike is an all-or-nothing event and the usual learning method, backpropagation, needs smooth values to work with. Neftci, Mostafa and Zenke described a workaround in “Surrogate gradient learning in spiking neural networks” in IEEE Signal Processing Magazine in 2019. It uses a smooth stand-in during training. It works, but it is a patch on an industry that was built around something else.

That something else is the GPU. Nearly every major AI framework, tutorial, pretrained model and hiring pipeline assumes one. A new chip needs its own tools, its own programmers and models adapted to its way of working.

Dhireesha Kudithipudi and colleagues make this point in “Neuromorphic computing at scale”, published in Nature in January 2025. They argue that getting from small demonstrations to large systems depends on hardware, algorithms and software advancing together. A faster chip alone will not do it.

A reasonable test for any 2026 announcement is whether it ships with tools an outside developer can use, or only a demo.

What a lazy chip would change

If sparse, event-driven hardware does reach everyday devices, the first effect is a practical one: sensors and wearables that run for much longer between charges, and smaller models running locally instead of in a distant data centre. Whether it dents the large-scale power numbers in the IEA report is a separate question. The big models in data centres are the ones that fit GPUs best, and nothing published so far shows that changing.

Energy saved at the chip is still only one part of the picture. For the wider supply side, there is the piece on the energy we already have but throw away. Cheap, always-on perception also changes what we hand over to machines, which connects to the question in whether AI is making us smarter or just better at outsourcing thinking.

The brain’s laziness comes with trade-offs. It ignores most of what is around it, fills gaps with guesses, and gets things wrong in predictable ways. A chip that copied the idleness would probably copy some of that selectivity too.

Tell me in the comments: if a chip could copy just one habit of your brain to save energy, which one would you pick, and which would you leave behind? ☕

Text with help of openAI’s ChatGPT Laguage Models & Fleeky – Images with help of Picsart & MIB